CV
This is a description of your CV.
Basics
| Name | Youngjin Luke Kim |
| Label | PhD Student |
| ykim9554@usc.edu |
Work
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2025.01 - Present Graduate Research Assistant
University of Southern California (USC)
Research on EDA for 2.5D/3D IC design and machine learning for EDA under Professor Sungkyu Lim
- EDA for 2.5D/3D IC Design
- Machine Learning for EDA
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2024.05 - 2024.08 Intern, Controller Development
Samsung Memory Division
Signal Processing Task Group, Algorithm Part - AI Storage Solution for Near-Data Processing
- Designed and implemented hardware-accelerated vector search engine for AI storage, achieving 20× speedup over CPU baseline
- Developed high-performance IVF+PQ algorithm pipeline on FPGA using C/C++-based HLS, optimizing memory access patterns and computational throughput
- Architected prefetching mechanisms for metadata filtering, focusing on data pipeline efficiency and latency reduction
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- Present Undergraduate Researcher
High-Speed Circuits Lab, Yonsei University
- Developed FPGA-based digital control algorithms for Silicon Micro Ring Modulators with real-time adaptive feedback
- Built Python-based simulation framework for thermal crosstalk modeling and compensation in photonic systems
- Implemented iterative optimization algorithms for multi-channel thermal interaction prediction
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- Present Undergraduate Researcher
HAI Lab, Yonsei University
- Designed custom RISC-V processor architecture with reconfigurable computing array for matrix multiplication acceleration, including custom ISA extensions and assembly-level optimization
- Implemented hardware description in Chisel, focusing on architecture topology optimization and computational efficiency for ML workloads (OpenGeMM)
Education
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2025.01 - 2030.01 Los Angeles, CA
Ph.D.
University of Southern California (USC)
Electrical and Computer Engineering
- 2.5D/3D IC Design
- Power Delivery Networks
- Machine Learning for EDA
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2019.03 - 2025.02 Seoul, South Korea
Awards
- 2024.11.01
IPESK Next Generation Engineer Award
Institute for Promotion of Engineering and Science of Korea
Selected as a next-generation engineer by IPESK
- 2023.09.01
Semiconductor Track Merit-Based & Academic Excellence Fellowship
Samsung Display & LG Display
$300 per semester and $300 monthly stipend for two years
- 2019.03.01
Merit-based Scholarship
Yonsei University
Multiple semesters - coverage of one-third to two-thirds of tuition fees
Publications
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2025.01.01 Dimension-Adaptive Reconfigurable Computing Array for Efficient GeMM Acceleration
In Progress
Co-authors: Kim, Y.-J, & Chung, J.
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2024.07.01 A simple and efficient thermal crosstalk cancellation technique for photonic weight banks in optic neural networks
OSK Summer Annual Meeting, Optics and Photonics Congress 2024
Oral presentation at ICC Jeju, Korea. Co-authors: Kim, Y.-J, Ji, Y.-J., & Choi, W.-Y.
Skills
| Hardware Design | |
| Verilog | |
| Xilinx HLS | |
| Synopsys Tools (DC, Verdi, Hspice) | |
| Virtuoso Cadence | |
| Chisel |
| Programming | |
| C/C++ | |
| Python | |
| MATLAB |
| Tools | |
| Linux | |
| Shell Script | |
| LaTeX |
Languages
| Korean | |
| Native speaker |
| English | |
| Fluent (TOEFL 102) |
Interests
| Computer Architecture | |||||
| 2.5D and 3D IC Design | |||||
| Power Delivery Networks | |||||
| Near-Data Processing | |||||
| Hardware Acceleration | |||||
| Electronic Design Automation | ||||
| ML for EDA Applications | ||||
| Reinforcement Learning for Physical Design | ||||
| Advanced Packaging | ||||